Merge branch 'master' of https://git.maggioni.xyz/Working-FFS/CAHomework
This commit is contained in:
commit
6b68d657fd
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@ -0,0 +1,424 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project source="2.7.1" version="1.0">
|
||||
This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
|
||||
<lib desc="#Wiring" name="0"/>
|
||||
<lib desc="#Gates" name="1"/>
|
||||
<lib desc="#Plexers" name="2"/>
|
||||
<lib desc="#Arithmetic" name="3"/>
|
||||
<lib desc="#Memory" name="4">
|
||||
<tool name="ROM">
|
||||
<a name="contents">addr/data: 8 8
|
||||
0
|
||||
</a>
|
||||
</tool>
|
||||
</lib>
|
||||
<lib desc="#I/O" name="5"/>
|
||||
<lib desc="#Base" name="6">
|
||||
<tool name="Text Tool">
|
||||
<a name="text" val=""/>
|
||||
<a name="font" val="SansSerif plain 12"/>
|
||||
<a name="halign" val="center"/>
|
||||
<a name="valign" val="base"/>
|
||||
</tool>
|
||||
</lib>
|
||||
<main name="main"/>
|
||||
<options>
|
||||
<a name="gateUndefined" val="ignore"/>
|
||||
<a name="simlimit" val="1000"/>
|
||||
<a name="simrand" val="0"/>
|
||||
</options>
|
||||
<mappings>
|
||||
<tool lib="6" map="Button2" name="Menu Tool"/>
|
||||
<tool lib="6" map="Button3" name="Menu Tool"/>
|
||||
<tool lib="6" map="Ctrl Button1" name="Menu Tool"/>
|
||||
</mappings>
|
||||
<toolbar>
|
||||
<tool lib="6" name="Poke Tool"/>
|
||||
<tool lib="6" name="Edit Tool"/>
|
||||
<tool lib="6" name="Text Tool">
|
||||
<a name="text" val=""/>
|
||||
<a name="font" val="SansSerif plain 12"/>
|
||||
<a name="halign" val="center"/>
|
||||
<a name="valign" val="base"/>
|
||||
</tool>
|
||||
<sep/>
|
||||
<tool lib="0" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</tool>
|
||||
<tool lib="0" name="Pin">
|
||||
<a name="facing" val="west"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</tool>
|
||||
<tool lib="1" name="NOT Gate">
|
||||
<a name="size" val="20"/>
|
||||
</tool>
|
||||
<tool lib="1" name="AND Gate"/>
|
||||
<tool lib="1" name="OR Gate"/>
|
||||
</toolbar>
|
||||
<circuit name="main">
|
||||
<a name="circuit" val="main"/>
|
||||
<a name="clabel" val=""/>
|
||||
<a name="clabelup" val="east"/>
|
||||
<a name="clabelfont" val="SansSerif plain 12"/>
|
||||
<wire from="(200,140)" to="(340,140)"/>
|
||||
<wire from="(190,60)" to="(200,60)"/>
|
||||
<wire from="(330,50)" to="(440,50)"/>
|
||||
<wire from="(430,100)" to="(500,100)"/>
|
||||
<wire from="(80,350)" to="(90,350)"/>
|
||||
<wire from="(330,150)" to="(330,250)"/>
|
||||
<wire from="(520,150)" to="(520,260)"/>
|
||||
<wire from="(200,20)" to="(200,60)"/>
|
||||
<wire from="(200,60)" to="(200,140)"/>
|
||||
<wire from="(440,270)" to="(480,270)"/>
|
||||
<wire from="(340,140)" to="(340,230)"/>
|
||||
<wire from="(440,50)" to="(440,80)"/>
|
||||
<wire from="(240,250)" to="(270,250)"/>
|
||||
<wire from="(90,160)" to="(100,160)"/>
|
||||
<wire from="(270,130)" to="(270,250)"/>
|
||||
<wire from="(510,260)" to="(520,260)"/>
|
||||
<wire from="(80,280)" to="(200,280)"/>
|
||||
<wire from="(320,210)" to="(320,320)"/>
|
||||
<wire from="(140,50)" to="(160,50)"/>
|
||||
<wire from="(450,70)" to="(500,70)"/>
|
||||
<wire from="(90,160)" to="(90,170)"/>
|
||||
<wire from="(90,290)" to="(200,290)"/>
|
||||
<wire from="(90,290)" to="(90,350)"/>
|
||||
<wire from="(260,80)" to="(290,80)"/>
|
||||
<wire from="(320,320)" to="(370,320)"/>
|
||||
<wire from="(310,100)" to="(310,130)"/>
|
||||
<wire from="(470,110)" to="(470,150)"/>
|
||||
<wire from="(200,20)" to="(290,20)"/>
|
||||
<wire from="(80,170)" to="(90,170)"/>
|
||||
<wire from="(150,70)" to="(150,100)"/>
|
||||
<wire from="(270,360)" to="(440,360)"/>
|
||||
<wire from="(80,210)" to="(320,210)"/>
|
||||
<wire from="(210,40)" to="(210,150)"/>
|
||||
<wire from="(260,80)" to="(260,240)"/>
|
||||
<wire from="(240,230)" to="(250,230)"/>
|
||||
<wire from="(90,60)" to="(90,70)"/>
|
||||
<wire from="(210,150)" to="(330,150)"/>
|
||||
<wire from="(80,40)" to="(100,40)"/>
|
||||
<wire from="(80,100)" to="(150,100)"/>
|
||||
<wire from="(430,250)" to="(480,250)"/>
|
||||
<wire from="(330,70)" to="(430,70)"/>
|
||||
<wire from="(430,70)" to="(430,100)"/>
|
||||
<wire from="(440,270)" to="(440,360)"/>
|
||||
<wire from="(250,60)" to="(290,60)"/>
|
||||
<wire from="(450,30)" to="(450,70)"/>
|
||||
<wire from="(470,110)" to="(500,110)"/>
|
||||
<wire from="(430,230)" to="(560,230)"/>
|
||||
<wire from="(80,70)" to="(90,70)"/>
|
||||
<wire from="(340,230)" to="(370,230)"/>
|
||||
<wire from="(330,250)" to="(370,250)"/>
|
||||
<wire from="(330,30)" to="(450,30)"/>
|
||||
<wire from="(240,240)" to="(260,240)"/>
|
||||
<wire from="(240,260)" to="(270,260)"/>
|
||||
<wire from="(80,140)" to="(100,140)"/>
|
||||
<wire from="(470,150)" to="(520,150)"/>
|
||||
<wire from="(130,150)" to="(210,150)"/>
|
||||
<wire from="(440,80)" to="(500,80)"/>
|
||||
<wire from="(250,60)" to="(250,230)"/>
|
||||
<wire from="(90,60)" to="(100,60)"/>
|
||||
<wire from="(270,130)" to="(310,130)"/>
|
||||
<wire from="(150,70)" to="(160,70)"/>
|
||||
<wire from="(550,90)" to="(560,90)"/>
|
||||
<wire from="(210,40)" to="(290,40)"/>
|
||||
<wire from="(270,260)" to="(270,360)"/>
|
||||
<comp lib="0" loc="(220,270)" name="Splitter">
|
||||
<a name="facing" val="west"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(130,150)" name="AND Gate">
|
||||
<a name="size" val="30"/>
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp loc="(330,10)" name="Logical Unit"/>
|
||||
<comp lib="1" loc="(510,260)" name="AND Gate">
|
||||
<a name="size" val="30"/>
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,210)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(46,46)" name="Text">
|
||||
<a name="text" val="A"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(190,60)" name="AND Gate">
|
||||
<a name="size" val="30"/>
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="2" loc="(220,270)" name="Decoder">
|
||||
<a name="select" val="2"/>
|
||||
<a name="enable" val="false"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,70)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,280)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,170)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,350)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(140,50)" name="XOR Gate">
|
||||
<a name="size" val="30"/>
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(39,216)" name="Text">
|
||||
<a name="text" val="INC"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(49,354)" name="Text">
|
||||
<a name="text" val="F1"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(48,286)" name="Text">
|
||||
<a name="text" val="F0"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(550,90)" name="OR Gate">
|
||||
<a name="inputs" val="4"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(36,174)" name="Text">
|
||||
<a name="text" val="ENB"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(44,147)" name="Text">
|
||||
<a name="text" val="B"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(560,230)" name="Pin">
|
||||
<a name="facing" val="west"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(595,94)" name="Text">
|
||||
<a name="text" val="C"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(38,107)" name="Text">
|
||||
<a name="text" val="ENA"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,40)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,100)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp loc="(430,220)" name="Full Adder"/>
|
||||
<comp lib="6" loc="(39,76)" name="Text">
|
||||
<a name="text" val="INVA"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(80,140)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(560,90)" name="Pin">
|
||||
<a name="facing" val="west"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</comp>
|
||||
</circuit>
|
||||
<circuit name="Full Adder">
|
||||
<a name="circuit" val="Full Adder"/>
|
||||
<a name="clabel" val=""/>
|
||||
<a name="clabelup" val="east"/>
|
||||
<a name="clabelfont" val="SansSerif plain 12"/>
|
||||
<appear>
|
||||
<path d="M85,72 Q99,99 118,71" fill="none" stroke="#808080" stroke-width="2"/>
|
||||
<rect fill="none" height="127" stroke="#000000" stroke-width="2" width="57" x="71" y="72"/>
|
||||
<text font-family="SansSerif" font-size="10" text-anchor="middle" x="100" y="144">Full Adder</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="172" y="94">Carry Out</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="157" y="115">Sum</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="56" y="94">A</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="56" y="115">B</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="36" y="185">Carry In</text>
|
||||
<circ-port height="8" pin="250,130" width="8" x="66" y="86"/>
|
||||
<circ-port height="8" pin="250,170" width="8" x="66" y="106"/>
|
||||
<circ-port height="10" pin="800,130" width="10" x="125" y="105"/>
|
||||
<circ-port height="8" pin="580,70" width="8" x="66" y="176"/>
|
||||
<circ-port height="10" pin="490,510" width="10" x="125" y="85"/>
|
||||
<circ-anchor facing="east" height="6" width="6" x="127" y="77"/>
|
||||
</appear>
|
||||
<wire from="(490,460)" to="(490,510)"/>
|
||||
<wire from="(540,150)" to="(710,150)"/>
|
||||
<wire from="(320,360)" to="(470,360)"/>
|
||||
<wire from="(250,170)" to="(340,170)"/>
|
||||
<wire from="(320,270)" to="(320,360)"/>
|
||||
<wire from="(580,70)" to="(580,110)"/>
|
||||
<wire from="(300,130)" to="(410,130)"/>
|
||||
<wire from="(300,130)" to="(300,220)"/>
|
||||
<wire from="(580,110)" to="(580,210)"/>
|
||||
<wire from="(470,360)" to="(470,410)"/>
|
||||
<wire from="(510,360)" to="(560,360)"/>
|
||||
<wire from="(510,360)" to="(510,410)"/>
|
||||
<wire from="(470,150)" to="(540,150)"/>
|
||||
<wire from="(340,170)" to="(410,170)"/>
|
||||
<wire from="(340,170)" to="(340,220)"/>
|
||||
<wire from="(250,130)" to="(300,130)"/>
|
||||
<wire from="(770,130)" to="(800,130)"/>
|
||||
<wire from="(580,110)" to="(710,110)"/>
|
||||
<wire from="(540,150)" to="(540,210)"/>
|
||||
<wire from="(560,260)" to="(560,360)"/>
|
||||
<comp lib="0" loc="(250,170)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(451,508)" name="Text">
|
||||
<a name="text" val="Carry out"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(832,129)" name="Text">
|
||||
<a name="text" val="Sum"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(560,260)" name="AND Gate">
|
||||
<a name="facing" val="south"/>
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(580,70)" name="Pin">
|
||||
<a name="facing" val="south"/>
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(770,130)" name="XOR Gate">
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(560,47)" name="Text">
|
||||
<a name="text" val="Carry in"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(470,150)" name="XOR Gate">
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(217,158)" name="Text">
|
||||
<a name="text" val="B"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(221,113)" name="Text">
|
||||
<a name="text" val="A"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(800,130)" name="Pin">
|
||||
<a name="facing" val="west"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(320,270)" name="AND Gate">
|
||||
<a name="facing" val="south"/>
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(490,510)" name="Pin">
|
||||
<a name="facing" val="north"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(250,130)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(490,460)" name="OR Gate">
|
||||
<a name="facing" val="south"/>
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
</circuit>
|
||||
<circuit name="Logical Unit">
|
||||
<a name="circuit" val="Logical Unit"/>
|
||||
<a name="clabel" val=""/>
|
||||
<a name="clabelup" val="east"/>
|
||||
<a name="clabelfont" val="SansSerif plain 12"/>
|
||||
<appear>
|
||||
<rect fill="none" height="93" stroke="#000000" stroke-width="2" width="41" x="489" y="297"/>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="509" y="338">L</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="509" y="355">U</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="477" y="314">A</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="478" y="334">B</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="448" y="354">Enable AND</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="454" y="373">Enable OR</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="512" y="405">Enable NOT</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="580" y="325">Output AND</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="576" y="344">Output OR</text>
|
||||
<text font-family="SansSerif" font-size="12" text-anchor="middle" x="580" y="364">Output NOT</text>
|
||||
<circ-port height="8" pin="140,160" width="8" x="486" y="306"/>
|
||||
<circ-port height="8" pin="140,240" width="8" x="486" y="326"/>
|
||||
<circ-port height="10" pin="650,160" width="10" x="525" y="315"/>
|
||||
<circ-port height="10" pin="650,240" width="10" x="525" y="335"/>
|
||||
<circ-port height="10" pin="650,320" width="10" x="525" y="355"/>
|
||||
<circ-port height="8" pin="440,460" width="8" x="486" y="346"/>
|
||||
<circ-port height="8" pin="460,460" width="8" x="486" y="366"/>
|
||||
<circ-port height="8" pin="480,460" width="8" x="506" y="386"/>
|
||||
<circ-anchor facing="east" height="6" width="6" x="527" y="297"/>
|
||||
</appear>
|
||||
<wire from="(320,240)" to="(340,240)"/>
|
||||
<wire from="(610,240)" to="(650,240)"/>
|
||||
<wire from="(370,300)" to="(560,300)"/>
|
||||
<wire from="(390,110)" to="(440,110)"/>
|
||||
<wire from="(280,160)" to="(280,200)"/>
|
||||
<wire from="(320,130)" to="(340,130)"/>
|
||||
<wire from="(440,180)" to="(560,180)"/>
|
||||
<wire from="(460,260)" to="(560,260)"/>
|
||||
<wire from="(610,320)" to="(650,320)"/>
|
||||
<wire from="(280,90)" to="(280,160)"/>
|
||||
<wire from="(440,140)" to="(560,140)"/>
|
||||
<wire from="(140,160)" to="(280,160)"/>
|
||||
<wire from="(280,90)" to="(340,90)"/>
|
||||
<wire from="(610,160)" to="(650,160)"/>
|
||||
<wire from="(320,300)" to="(340,300)"/>
|
||||
<wire from="(390,220)" to="(560,220)"/>
|
||||
<wire from="(280,200)" to="(340,200)"/>
|
||||
<wire from="(140,240)" to="(320,240)"/>
|
||||
<wire from="(460,260)" to="(460,460)"/>
|
||||
<wire from="(440,110)" to="(440,140)"/>
|
||||
<wire from="(480,340)" to="(560,340)"/>
|
||||
<wire from="(320,240)" to="(320,300)"/>
|
||||
<wire from="(440,180)" to="(440,460)"/>
|
||||
<wire from="(480,340)" to="(480,460)"/>
|
||||
<wire from="(320,130)" to="(320,240)"/>
|
||||
<comp lib="1" loc="(610,160)" name="AND Gate">
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(440,460)" name="Pin">
|
||||
<a name="facing" val="north"/>
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(370,300)" name="NOT Gate"/>
|
||||
<comp lib="6" loc="(460,498)" name="Text">
|
||||
<a name="text" val="Enable Lines"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(650,160)" name="Pin">
|
||||
<a name="facing" val="west"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(480,460)" name="Pin">
|
||||
<a name="facing" val="north"/>
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(650,240)" name="Pin">
|
||||
<a name="facing" val="west"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(650,320)" name="Pin">
|
||||
<a name="facing" val="west"/>
|
||||
<a name="output" val="true"/>
|
||||
<a name="labelloc" val="east"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(390,220)" name="OR Gate">
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(610,240)" name="AND Gate">
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(140,240)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(610,320)" name="AND Gate">
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(460,460)" name="Pin">
|
||||
<a name="facing" val="north"/>
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(114,228)" name="Text">
|
||||
<a name="text" val="B"/>
|
||||
</comp>
|
||||
<comp lib="1" loc="(390,110)" name="AND Gate">
|
||||
<a name="inputs" val="2"/>
|
||||
</comp>
|
||||
<comp lib="6" loc="(111,137)" name="Text">
|
||||
<a name="text" val="A"/>
|
||||
</comp>
|
||||
<comp lib="0" loc="(140,160)" name="Pin">
|
||||
<a name="tristate" val="false"/>
|
||||
</comp>
|
||||
</circuit>
|
||||
</project>
|
||||
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|
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|
|
@ -0,0 +1,36 @@
|
|||
\documentclass[12pt]{article}
|
||||
|
||||
\usepackage{karnaugh-map}
|
||||
\usepackage[utf8]{inputenc}
|
||||
\usepackage[margin=2cm]{geometry}
|
||||
|
||||
\title{Howework 6 -- Computer Architecture}
|
||||
\author{Claudio Maggioni \and Tommaso Rodolfo Masera}
|
||||
|
||||
\begin{document}
|
||||
\maketitle
|
||||
\section{Question 1}
|
||||
\subsection{Sub-question 1}
|
||||
\begin{figure}[h]
|
||||
\centering{\includegraphics[width=0.6\textwidth]{1.png}}
|
||||
\end{figure}
|
||||
|
||||
\subsection{Sub-question 2}
|
||||
\begin{figure}[h]
|
||||
\centering{\includegraphics[width=0.6\textwidth]{2.png}}
|
||||
\end{figure}
|
||||
|
||||
\pagebreak
|
||||
|
||||
\subsection{Sub-question 3}
|
||||
\begin{figure}[h]
|
||||
\centering{\includegraphics[width=0.6\textwidth]{3.png}}
|
||||
\end{figure}
|
||||
|
||||
\section{Question 2}
|
||||
Please find the attached \texttt{2.circ} \emph{Logisim} file.
|
||||
|
||||
\section{Question 3}
|
||||
Please find the attached \texttt{3.circ} \emph{Logisim} file.
|
||||
|
||||
\end{document}
|
||||
Reference in New Issue