120 lines
6.6 KiB
TeX
120 lines
6.6 KiB
TeX
\documentclass[unicode,11pt,a4paper,oneside,numbers=endperiod,openany]{scrartcl}
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\input{assignment.sty}
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\usepackage{fancyvrb}
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\begin{document}
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\setassignment
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\setduedate{12.10.2022 (midnight)}
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\serieheader{High-Performance Computing Lab}{2022}{Student: Claudio
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Maggioni}{Discussed with: ---}{Solution for Project 1}{}
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\newline
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\assignmentpolicy
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In this project you will practice memory access optimization, performance-oriented programming, and OpenMP parallelizaton
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on the ICS Cluster .
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\section{Explaining Memory Hierarchies \punkte{25}}
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\subsection{Memory Hierarchy Parameters of the Cluster}
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By identifying the memory hierarchy parameters through \texttt{likwid-topology}
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for the cache topology and \texttt{free -g} for the amount of primary memory I
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find the following values:
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\begin{center}
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\begin{tabular}{llll}
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Main memory & 62 GB \\
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L3 cache & 25 MB per socket \\
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L2 cache & 256 kB per core \\
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L1 cache & 32 kB per core
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\end{tabular}
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\end{center}
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All values are reported using base 2 IEC byte units. The cluster has 2 sockets
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and a total of 20 cores (10 per socket). The cache topology diagram reported by
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\texttt{likwid-topology -g} is the following:
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\pagebreak[4]
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% https://tex.stackexchange.com/a/171818
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\begin{Verbatim}[fontsize=\tiny]
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Socket 0:
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+---------------------------------------------------------------------------------------------------------------+
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 0 | | 1 | | 2 | | 3 | | 4 | | 5 | | 6 | | 7 | | 8 | | 9 | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +-----------------------------------------------------------------------------------------------------------+ |
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| | 25 MB | |
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| +-----------------------------------------------------------------------------------------------------------+ |
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+---------------------------------------------------------------------------------------------------------------+
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Socket 1:
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+---------------------------------------------------------------------------------------------------------------+
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 10 | | 11 | | 12 | | 13 | | 14 | | 15 | | 16 | | 17 | | 18 | | 19 | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | | 32 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | | 256 kB | |
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| +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ +--------+ |
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| +-----------------------------------------------------------------------------------------------------------+ |
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| | 25 MB | |
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| +-----------------------------------------------------------------------------------------------------------+ |
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+---------------------------------------------------------------------------------------------------------------+
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\end{Verbatim}
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\subsection{Memory Access Pattern of \texttt{membench.c}}
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The benchmark \texttt{membench.c} measures the average time of repeated read and
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write overations across a set of indices of a stack-allocated array of 32-bit
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signed integers. The indices vary according to the access pattern used, which in
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turn is defined by two variables, \texttt{csize} and \texttt{stride}.
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\texttt{csize} is an upper bound on the index value, i.e. (one more of) the
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highest index used to access the array in the pattern. \texttt{stride}
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determines the difference between array indexes over access iterations, i.e. a
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\texttt{stride} of 1 will access every array index, a \texttt{stride} of 2 will
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skip every other index, a \texttt{stride} of 4 will access one index then skip 3
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and so on and so forth.
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Therefore, for \texttt{csize = 128} and \texttt{stride = 1} the array will
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access all indexes between 0 and 127 sequentially, and for \texttt{csize =
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$2^{20}$} and \texttt{stride = $2^{10}$} the benchmark will access index 0, then
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index $2^{10}-1$, and finally index $2^{20}-1$.
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\subsection{Analyzing Benchmark Results}
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The \texttt{membench.c} benchmark results for my personal laptop (Macbook Pro
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2018 with a Core i7-8750H CPU) and the cluster are shown below respectively:
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\begin{center}
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\includegraphics[width=12cm]{generic_macos.pdf}
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\includegraphics[width=12cm]{generic_cluster.pdf}
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\end{center}
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The memory access graph for the cluster's benchmark results shows that temporal
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locality is best for small array sizes and for small \texttt{stride} values.
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In particular, for array memory sizes of 16MB or lower (\texttt{csize} of $4
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\cdot 2^{20}$ or lower) and \texttt{stride} values of 2048 or lower the mean
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read+write time is less than 10 nanoseconds. Temporal locality is worst for
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large sizes and strides, although the largest values of \texttt{stride} for each
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size (like \texttt{csize / 2} and \texttt{csize / 4}) achieve better mean times
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due to the few elements accessed in the pattern (this observation is also valid
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for the largest strides of each size series shown in the graph).
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\section{Optimize Square Matrix-Matrix Multiplication \punkte{60}}
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\section{Quality of the Report \punkte{15}}
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\end{document}
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