diff --git a/include/cpuinfo.h b/include/cpuinfo.h index 6c67c34..85ce174 100644 --- a/include/cpuinfo.h +++ b/include/cpuinfo.h @@ -417,6 +417,8 @@ enum cpuinfo_uarch { cpuinfo_uarch_cortex_a76 = 0x00300376, /** ARM Cortex-A77. */ cpuinfo_uarch_cortex_a77 = 0x00300377, + /** ARM Cortex-A78. */ + cpuinfo_uarch_cortex_a78 = 0x00300378, /** ARM Neoverse N1. */ cpuinfo_uarch_neoverse_n1 = 0x00300400, @@ -1434,6 +1436,7 @@ static inline bool cpuinfo_has_x86_sha(void) { bool armv6k; bool armv7; bool armv7mp; + bool armv8; bool idiv; bool vfpv2; @@ -1521,6 +1524,16 @@ static inline bool cpuinfo_has_arm_v7mp(void) { #endif } +static inline bool cpuinfo_has_arm_v8(void) { + #if CPUINFO_ARCH_ARM64 + return true; + #elif CPUINFO_ARCH_ARM + return cpuinfo_isa.armv8; + #else + return false; + #endif +} + static inline bool cpuinfo_has_arm_idiv(void) { #if CPUINFO_ARCH_ARM64 return true; @@ -1645,6 +1658,16 @@ static inline bool cpuinfo_has_arm_neon_fma(void) { #endif } +static inline bool cpuinfo_has_arm_neon_v8(void) { + #if CPUINFO_ARCH_ARM64 + return true; + #elif CPUINFO_ARCH_ARM + return cpuinfo_isa.neon && cpuinfo_isa.armv8; + #else + return false; + #endif +} + static inline bool cpuinfo_has_arm_atomics(void) { #if CPUINFO_ARCH_ARM64 return cpuinfo_isa.atomics; diff --git a/src/arm/linux/aarch32-isa.c b/src/arm/linux/aarch32-isa.c index 64dd168..41f9972 100644 --- a/src/arm/linux/aarch32-isa.c +++ b/src/arm/linux/aarch32-isa.c @@ -43,6 +43,7 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo( isa->armv6k = true; isa->armv7 = true; isa->armv7mp = true; + isa->armv8 = true; isa->thumb = true; isa->thumb2 = true; isa->idiv = true; diff --git a/src/arm/mach/init.c b/src/arm/mach/init.c index 058cfc2..e912de6 100644 --- a/src/arm/mach/init.c +++ b/src/arm/mach/init.c @@ -307,6 +307,7 @@ void cpuinfo_arm_mach_init(void) { case CPU_TYPE_ARM: switch (cpu_subtype) { case CPU_SUBTYPE_ARM_V8: + cpuinfo_isa.armv8 = true; cpuinfo_isa.aes = true; cpuinfo_isa.sha1 = true; cpuinfo_isa.sha2 = true; diff --git a/src/arm/midr.h b/src/arm/midr.h index 34d7780..2638517 100644 --- a/src/arm/midr.h +++ b/src/arm/midr.h @@ -183,6 +183,7 @@ inline static uint32_t midr_score_core(uint32_t midr) { case UINT32_C(0x51008000): /* Kryo 260 / 280 Gold */ case UINT32_C(0x51002050): /* Kryo Gold */ case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */ + case UINT32_C(0x4100D410): /* Cortex-A78 */ case UINT32_C(0x4100D0D0): /* Cortex-A77 */ case UINT32_C(0x4100D0E0): /* Cortex-A76AE */ case UINT32_C(0x4100D0B0): /* Cortex-A76 */ diff --git a/src/arm/uarch.c b/src/arm/uarch.c index 55b61df..0d7a7d7 100644 --- a/src/arm/uarch.c +++ b/src/arm/uarch.c @@ -91,6 +91,9 @@ void cpuinfo_arm_decode_vendor_uarch( case 0xD0E: /* Cortex-A76AE */ *uarch = cpuinfo_uarch_cortex_a76; break; + case 0xD41: /* Cortex-A78 */ + *uarch = cpuinfo_uarch_cortex_a78; + break; #if CPUINFO_ARCH_ARM64 && !defined(__ANDROID__) case 0xD4A: *uarch = cpuinfo_uarch_neoverse_e1; diff --git a/tools/cpu-info.c b/tools/cpu-info.c index 2759068..429bbfa 100644 --- a/tools/cpu-info.c +++ b/tools/cpu-info.c @@ -183,6 +183,8 @@ static const char* uarch_to_string(enum cpuinfo_uarch uarch) { return "Cortex-A76"; case cpuinfo_uarch_cortex_a77: return "Cortex-A77"; + case cpuinfo_uarch_cortex_a78: + return "Cortex-A78"; case cpuinfo_uarch_scorpion: return "Scorpion"; case cpuinfo_uarch_krait: diff --git a/tools/isa-info.c b/tools/isa-info.c index 98ef919..8365846 100644 --- a/tools/isa-info.c +++ b/tools/isa-info.c @@ -121,6 +121,7 @@ int main(int argc, char** argv) { printf("\tARMv6-K: %s\n", cpuinfo_has_arm_v6k() ? "yes" : "no"); printf("\tARMv7: %s\n", cpuinfo_has_arm_v7() ? "yes" : "no"); printf("\tARMv7 MP: %s\n", cpuinfo_has_arm_v7mp() ? "yes" : "no"); + printf("\tARMv8: %s\n", cpuinfo_has_arm_v8() ? "yes" : "no"); printf("\tIDIV: %s\n", cpuinfo_has_arm_idiv() ? "yes" : "no"); printf("Floating-Point support:\n");