106 lines
3.5 KiB
C
Executable file
106 lines
3.5 KiB
C
Executable file
#include "userprog/tss.h"
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#include <debug.h>
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#include <stddef.h>
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#include "userprog/gdt.h"
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#include "threads/thread.h"
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#include "threads/palloc.h"
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#include "threads/vaddr.h"
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/* The Task-State Segment (TSS).
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Instances of the TSS, an x86-specific structure, are used to
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define "tasks", a form of support for multitasking built right
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into the processor. However, for various reasons including
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portability, speed, and flexibility, most x86 OSes almost
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completely ignore the TSS. We are no exception.
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Unfortunately, there is one thing that can only be done using
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a TSS: stack switching for interrupts that occur in user mode.
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When an interrupt occurs in user mode (ring 3), the processor
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consults the ss0 and esp0 members of the current TSS to
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determine the stack to use for handling the interrupt. Thus,
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we must create a TSS and initialize at least these fields, and
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this is precisely what this file does.
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When an interrupt is handled by an interrupt or trap gate
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(which applies to all interrupts we handle), an x86 processor
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works like this:
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- If the code interrupted by the interrupt is in the same
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ring as the interrupt handler, then no stack switch takes
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place. This is the case for interrupts that happen when
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we're running in the kernel. The contents of the TSS are
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irrelevant for this case.
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- If the interrupted code is in a different ring from the
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handler, then the processor switches to the stack
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specified in the TSS for the new ring. This is the case
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for interrupts that happen when we're in user space. It's
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important that we switch to a stack that's not already in
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use, to avoid corruption. Because we're running in user
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space, we know that the current process's kernel stack is
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not in use, so we can always use that. Thus, when the
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scheduler switches threads, it also changes the TSS's
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stack pointer to point to the new thread's kernel stack.
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(The call is in thread_schedule_tail() in thread.c.)
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See [IA32-v3a] 6.2.1 "Task-State Segment (TSS)" for a
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description of the TSS. See [IA32-v3a] 5.12.1 "Exception- or
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Interrupt-Handler Procedures" for a description of when and
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how stack switching occurs during an interrupt. */
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struct tss
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{
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uint16_t back_link, :16;
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void *esp0; /* Ring 0 stack virtual address. */
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uint16_t ss0, :16; /* Ring 0 stack segment selector. */
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void *esp1;
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uint16_t ss1, :16;
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void *esp2;
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uint16_t ss2, :16;
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uint32_t cr3;
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void (*eip) (void);
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uint32_t eflags;
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uint32_t eax, ecx, edx, ebx;
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uint32_t esp, ebp, esi, edi;
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uint16_t es, :16;
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uint16_t cs, :16;
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uint16_t ss, :16;
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uint16_t ds, :16;
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uint16_t fs, :16;
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uint16_t gs, :16;
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uint16_t ldt, :16;
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uint16_t trace, bitmap;
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};
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/* Kernel TSS. */
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static struct tss *tss;
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/* Initializes the kernel TSS. */
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void
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tss_init (void)
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{
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/* Our TSS is never used in a call gate or task gate, so only a
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few fields of it are ever referenced, and those are the only
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ones we initialize. */
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tss = palloc_get_page (PAL_ASSERT | PAL_ZERO);
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tss->ss0 = SEL_KDSEG;
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tss->bitmap = 0xdfff;
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tss_update ();
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}
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/* Returns the kernel TSS. */
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struct tss *
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tss_get (void)
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{
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ASSERT (tss != NULL);
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return tss;
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}
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/* Sets the ring 0 stack pointer in the TSS to point to the end
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of the thread stack. */
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void
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tss_update (void)
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{
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ASSERT (tss != NULL);
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tss->esp0 = (uint8_t *) thread_current () + PGSIZE;
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}
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